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LC01707PLF
Register Map 1
* HEX value is set by default.
: Unused BIT
Register
Read/
Binary
Hex
address
BIT
Bit name
Function
Bit operation
Write
value
value
00h
7
0
6
5
4
SD_SL[2]
SD_SL[1]
SD_SL[0]
SD level detection setting
0:DRS0 1:DRS1 2:DRS2 3:DRS3 4:DRS4 5:DRS5 6:DRS6 7:DRS7
R/W
R/W
R/W
0
0
0
3
2
1
DWAG[3]
DWAG[2]
DWAG[1]
Wide band AGC level setting
0:15.6mVp-p 1:31.3mVp-p 2:46.9mVp-p 3:62.5mVp-p
4:78.1mVp-p 5:93.8mVp-p 6:109.4mVp-p 7:125.0mVp-p
8:140.6mVp-p 9:156.3mVp-p 10:171.9mVp-p 11:187.5mVp-p
12:203.1mVp-p 13:218.8mVp-p 14:234.4mVp-p 15:250mVp-p
R/W
R/W
R/W
0
0
0
h’00
01h
0
7
6
5
4
DWAG[0]
R/W
0
0
0
0
0
h’00
3
2
0
0
1
0
IMSD_SL[1]
IMSD_SL[0]
Unused
0
0
02h
7
6
5
CLKIN
DLOCKSEL
DFSEL[1]
XTAL current setting
LOCKDET output waveform selection
Phase comparison frequency selection
1:Normal 0:Twice
1:Number of comparing 6 0:Munber of comparing 3
0:100kHz 1:50kHz 2:50kHz 3:25kHz
R/W
R/W
R/W
1
0
0
4
DFSEL[0]
R/W
1
h’99
3
2
1
0
ENPE
DNGA[2]
DNGA[1]
DNGA[0]
Entire circuit enable
Narrow band AGC level setting
1:ON 0:OFF (Entire circuit OFF)
0:35mVp-p 1:111mVp-p 2:187mVp-p 3:263mVp-p
4:339mVp-p 5:415mVp-p 6:491mVp-p 7:567mVp-p
(When the setting value is ether 0 or 1 and MSK=4%, error is
detected in BER.)
R/W
R/W
R/W
R/W
1
0
0
1
03h
7
6
5
4
ENCPLEVEL
DENPRO
DENPD
DENCP
Charge pump level comparison selection
Program counter enable
Phase comparison enable
Charge pump enable
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
R/W
R/W
R/W
R/W
1
1
1
1
h’FF
3
2
1
0
DENREF
DENXTAL
DEBDEMO
ENFST
S-meter enable
XTAL enable
Demodulator enable
Complex BPF block, IF AGC block enable
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
R/W
R/W
R/W
R/W
1
1
1
1
04h
7
6
5
4
DENLEVELDET
ENRFMIX
ENIFLPF
ENDET
Capacitor bank control circuit enable
RFMIX enable
IF LPF enable
Wide band AGC, Narrow band AGC block enable
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
R/W
R/W
R/W
R/W
0
1
1
1
h’7F
3
2
1
0
ENLNA
DENSMETER
DLOEN
DENPLL
LNA block enable
Reference counter enable
Local oscillation enable
PLL block enable
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
1:ON 0:OFF
R/W
R/W
R/W
R/W
1
1
1
1
05h
7
6
5
4
3
2
0
0
0
0
0
0
h’03
1
0
DNBAGC
DWBAGC
IF AGC detection selector (Narrow band AGC)
RF AGC detection selector (Wide band AGC)
1:ON 0:OFF
1:ON 0:OFF
R/W
R/W
1
1
06h
7
6
5
4
DF0OSC[7]
DF0OSC[6]
DF0OSC[5]
DF0OSC[4]
Capacitor band value
Oscillation frequency adjustment for master time
constant setting
R/W
R/W
R/W
R/W
1
0
0
0
h’80
3
2
1
0
DF0OSC[3]
DF0OSC[2]
DF0OSC[1]
DF0OSC[0]
R/W
R/W
R/W
R/W
0
0
0
0
07h
7
6
5
4
DBPFO[7]
DBPFO[6]
DBPFO[5]
DBPFO[4]
Capacitor bank value
Complex BPF F0 adjustment
R/W
R/W
R/W
R/W
1
0
0
0
h’80
3
2
1
0
DBPFO[3]
DBPFO[2]
DBPFO[1]
DBPFO[0]
R/W
R/W
R/W
R/W
0
0
0
0
No.A1928-14/18
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